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Información tecnológica

versión On-line ISSN 0718-0764

Resumen

LOPEZ, Francisco; SOTO, Blanca S; ZUNIGA, Carlos  y  ALCANTARA, Salvador. Planar Microelectrode Array with CMOS Standar Process (Complementary Metal-Oxide-Semiconductor). Inf. tecnol. [online]. 2011, vol.22, n.3, pp.115-124. ISSN 0718-0764.  http://dx.doi.org/10.4067/S0718-07642011000300013.

The design and the on-chip integration of planar microelectronic array and the read-out circuit implemented by 0.6 µm CMOS process (Complementary Metal-Oxide-Semiconductor), is presented. The design includes a shielding ring around the microelectrode array and a control for a tunable low pass filter, which are made with a CMOS transmission gate operating in subthreshold region. This is achieved by varying the gate voltage in a range from 400 to 800 mV for a frequency range of 1 to 1KHz. The performance of the circuit with a voltage supply ± 1.5 V was 40dB gain, 44 dB PSRR (power supply rejection ratio) and 87 dB CMRR (common-mode rejection ratio), in an area of 0.014mm2, showing that the system is a good alternative for biological applications. 

Palabras clave : CMOS; microelectrode; transmission gate; biopotentials; passband filter.

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